//these arent quite opcodes, they are interrupts
#define CHECK_NMI					\
	if(Interrupts & INT_NMI)	\
		{								\
		if(WaitInterrupt)			\
			WaitInterrupt = 0;	\
		else							\
			{							\
			CC |= 0x80;				\
			PushS16(PC);			\
			PushS16(U);				\
			PushS16(Y);				\
			PushS16(X);				\
			PushS(DP);				\
			PushS(B);				\
			PushS(A);				\
			PushS(CC);				\
			}							\
		CC |= F_IRQ | F_FIRQ;	\
		PC = ReadWord(0xFFFC);	\
		Interrupts &= ~INT_NMI;	\
		Cycle += 19;				\
		}

#define CHECK_IRQ					\
	if((Interrupts & INT_IRQ) && ((CC & F_IRQ) == 0))	\
		{								\
		if(WaitInterrupt)			\
			WaitInterrupt = 0;	\
		else							\
			{							\
			CC |= 0x80;				\
			PushS16(PC);			\
			PushS16(U);				\
			PushS16(Y);				\
			PushS16(X);				\
			PushS(DP);				\
			PushS(B);				\
			PushS(A);				\
			PushS(CC);				\
			}							\
		CC |= F_IRQ;				\
		PC = ReadWord(0xFFF8);	\
		Interrupts &= ~INT_IRQ;	\
		Cycle += 19;				\
		}

#define CHECK_FIRQ				\
	if((Interrupts & INT_FIRQ) && ((CC & F_FIRQ) == 0))	\
		{								\
		if(WaitInterrupt)			\
			WaitInterrupt = 0;	\
		else							\
			{							\
			CC &= ~0x80;			\
			PushS16(PC);			\
			PushS(CC);				\
			}							\
		CC |= F_IRQ | F_FIRQ;	\
		PC = ReadWord(0xFFF6);	\
		Interrupts &= ~INT_FIRQ;\
		Cycle += 10;				\
		}

#define CHECK_INTERRUPTS		\
	if(Interrupts)					\
		{								\
		CHECK_NMI;					\
		CHECK_FIRQ;					\
		CHECK_IRQ;					\
		}

//macros
#define CheckNZ(dd)			\
	if((dd) == 0)				\
		CC |= F_ZERO;			\
	if((dd) & 0x80)			\
		CC |= F_NEGATIVE;

#define CheckNZ16(dd)		\
	if((u16)(dd) == 0)		\
		CC |= F_ZERO;			\
	if((dd) & 0x8000)			\
		CC |= F_NEGATIVE;

#define SetA(dd)				\
	D &= 0xFF;					\
	D |= (u8)(dd);

#define SetB(dd)				\
	D &= (0xFF) << 8;			\
	D |= (u8)((dd) << 8);

#define BRANCH(cc)			\
	tmp = Read(PC++);			\
	if(cc)						\
		PC += (s8)tmp;

#define LBRANCH(cc)			\
	tmp2 = ReadWord(PC);		\
	PC += 2;						\
	if(cc)						\
		{							\
		PC += (s16)tmp2;		\
		Cycle++;					\
		}

//addressing modes
#define IMMEDIATE8	EA = PC++;
#define IMMEDIATE		EA = PC; PC += 2;
#define DIRECT			EA = (DP << 8) | Read(PC++);
#define INDEXED		Indexed();
#define EXTENDED		EA = ReadWord(PC); PC += 2;

//opcodes
#define NEG						\
	tmp = Read(EA);			\
	tmp2 = -tmp;				\
	CC &= ~(F_CARRY | F_OVERFLOW | F_ZERO | F_NEGATIVE);	\
	CC |= (tmp2 & 0x100) >> 8;	\
	if((0 ^ tmp ^ tmp2 ^ (tmp2 >> 1)) & 0x80)	\
		CC |= F_OVERFLOW;		\
	CheckNZ(tmp2&0xFF);		\
	Write(EA,(u8)tmp2);

#define COM						\
	tmp = Read(EA);			\
	CC &= ~(F_OVERFLOW | F_ZERO | F_NEGATIVE);	\
	CC |= F_CARRY;				\
	tmp = ~tmp;					\
	CheckNZ(tmp);				\
	Write(EA,tmp);

#define LDX						\
	X = ReadWord(EA);			\
	CC &= ~(F_ZERO | F_NEGATIVE | F_OVERFLOW);	\
	CheckNZ16(X);

#define STX						\
	WriteWord(EA,X);			\
	CC &= ~(F_ZERO | F_NEGATIVE | F_OVERFLOW);	\
	CheckNZ16(X);

#define LDY						\
	Y = ReadWord(EA);			\
	CC &= ~(F_ZERO | F_NEGATIVE | F_OVERFLOW);	\
	CheckNZ16(Y);

#define STY						\
	WriteWord(EA,Y);			\
	CC &= ~(F_ZERO | F_NEGATIVE | F_OVERFLOW);	\
	CheckNZ16(Y);

#define LDU						\
	U = ReadWord(EA);			\
	CC &= ~(F_ZERO | F_NEGATIVE | F_OVERFLOW);	\
	CheckNZ16(U);

#define STU						\
	WriteWord(EA,U);			\
	CC &= ~(F_ZERO | F_NEGATIVE | F_OVERFLOW);	\
	CheckNZ16(U);

#define LDS						\
	S = ReadWord(EA);			\
	CC &= ~(F_ZERO | F_NEGATIVE | F_OVERFLOW);	\
	CheckNZ16(S);
	
#define STS						\
	WriteWord(EA,S);			\
	CC &= ~(F_ZERO | F_NEGATIVE | F_OVERFLOW);	\
	CheckNZ16(S);

#define LDD						\
	D = ReadWord(EA);			\
	CC &= ~(F_ZERO | F_NEGATIVE | F_OVERFLOW);	\
	CheckNZ16(D);
	
#define STD						\
	WriteWord(EA,D);			\
	CC &= ~(F_ZERO | F_NEGATIVE | F_OVERFLOW);	\
	CheckNZ16(D);

#define LDA						\
	A = Read(EA);				\
	CC &= ~(F_ZERO | F_NEGATIVE | F_OVERFLOW);	\
	CheckNZ(A);
	
#define STA						\
	Write(EA,A);				\
	CC &= ~(F_ZERO | F_NEGATIVE | F_OVERFLOW);	\
	CheckNZ(A);

#define LDB						\
	B = Read(EA);				\
	CC &= ~(F_ZERO | F_NEGATIVE | F_OVERFLOW);	\
	CheckNZ(B);
	
#define STB						\
	Write(EA,B);				\
	CC &= ~(F_ZERO | F_NEGATIVE | F_OVERFLOW);	\
	CheckNZ(B);

#define DEC						\
	tmp = Read(EA) - 1;		\
	Write(EA,tmp);				\
	CC &= ~(F_ZERO | F_NEGATIVE | F_OVERFLOW);	\
	if(tmp == 0x7F)			\
		CC |= F_OVERFLOW;		\
	CheckNZ(tmp);

#define INC						\
	tmp = Read(EA) + 1;		\
	Write(EA,tmp);				\
	CC &= ~(F_ZERO | F_NEGATIVE | F_OVERFLOW);	\
	if(tmp == 0x80)			\
		CC |= F_OVERFLOW;		\
	CheckNZ(tmp);

#define TST						\
	CC &= ~(F_ZERO | F_NEGATIVE | F_OVERFLOW);	\
	CheckNZ(Read(EA));

#define CLR						\
	Write(EA,0);				\
	CC |= F_ZERO;				\
	CC &= ~(F_CARRY | F_OVERFLOW | F_NEGATIVE);

#define ADDD					\
	tmp3 = ReadWord(EA);		\
	tmp2 = D + tmp3;			\
	CC &= ~(F_ZERO | F_NEGATIVE | F_OVERFLOW | F_CARRY);	\
	if(tmp2 & 0x10000)		\
		CC |= F_CARRY;			\
	if((tmp2 ^ D ^ tmp3 ^ (tmp2 >> 1)) & 0x8000)	\
		CC |= F_OVERFLOW;		\
	D = (u16)tmp2;				\
	CheckNZ16(D);

#define SUBD					\
	tmp3 = ReadWord(EA);		\
	tmp2 = D - tmp3;			\
	CC &= ~(F_ZERO | F_NEGATIVE | F_OVERFLOW | F_CARRY);	\
	if(tmp2 & 0x10000)		\
		CC |= F_CARRY;			\
	if((tmp2 ^ D ^ tmp3 ^ (tmp2 >> 1)) & 0x8000)	\
		CC |= F_OVERFLOW;		\
	D = (u16)tmp2;				\
	CheckNZ16(D);

#define ORA						\
	A |= Read(EA);				\
	CC &= ~(F_ZERO | F_NEGATIVE | F_OVERFLOW);	\
	CheckNZ(A);
	
#define EORA					\
	A ^= Read(EA);				\
	CC &= ~(F_ZERO | F_NEGATIVE | F_OVERFLOW);	\
	CheckNZ(A);
	
#define ANDA					\
	A &= Read(EA);				\
	CC &= ~(F_ZERO | F_NEGATIVE | F_OVERFLOW);	\
	CheckNZ(A);

#define BITA					\
	tmp = A & Read(EA);		\
	CC &= ~(F_ZERO | F_NEGATIVE | F_OVERFLOW);	\
	CheckNZ(tmp);

#define RORA					\
	ntmp = CC & F_CARRY;		\
	CC &= ~(F_ZERO | F_NEGATIVE | F_CARRY);	\
	CC |= A & 1;				\
	A >>= 1;						\
	A |= ntmp << 7;			\
	CheckNZ(A);

#define ROLA					\
	tmp = A;						\
	ntmp = CC & F_CARRY;		\
	CC &= ~(F_ZERO | F_NEGATIVE | F_CARRY | F_OVERFLOW);	\
	CC |= (A >> 7) & 1;		\
	A = (A << 1) | ntmp;		\
	if((tmp ^ A) & 0x80)		\
		CC |= F_OVERFLOW;		\
	CheckNZ(A);

#define LSRA					\
	CC &= ~(F_ZERO | F_NEGATIVE | F_CARRY);	\
	CC |= A & 1;				\
	A >>= 1;						\
	if(A == 0)					\
		CC |= F_ZERO;

#define LSLA					\
	tmp = A;						\
	CC &= ~(F_ZERO | F_NEGATIVE | F_CARRY | F_OVERFLOW);	\
	CC |= (A >> 7) & 1;		\
	A <<= 1;						\
	if((A ^ tmp) & 0x80)		\
		CC |= F_OVERFLOW;		\
	CheckNZ(A);					\

#define ASRA					\
	CC &= ~(F_ZERO | F_NEGATIVE | F_CARRY);	\
	CC |= A & 1;				\
	A = (A & 0x80) | (A >> 1);	\
	CheckNZ(A);

#define TSTA					\
	CC &= ~(F_ZERO | F_NEGATIVE | F_OVERFLOW);	\
	CheckNZ(A);

#define ADDA					\
	tmp = Read(EA);			\
	tmp2 = A + tmp;			\
	CC &= ~(F_ZERO | F_NEGATIVE | F_OVERFLOW | F_CARRY | F_HALFCARRY);	\
	if(tmp2 & 0x100)			\
		CC |= F_CARRY;			\
   if((tmp2 ^ A ^ tmp) & 0x10)	\
      CC |= F_HALFCARRY;	\
	if((tmp2 ^ A ^ tmp ^ (tmp2 >> 1)) & 0x80)	\
		CC |= F_OVERFLOW;		\
	A = (u8)tmp2;				\
	CheckNZ(A);

#define SUBA					\
	tmp = Read(EA);			\
	tmp2 = A - tmp;			\
	CC &= ~(F_ZERO | F_NEGATIVE | F_OVERFLOW | F_CARRY);	\
	if(tmp2 & 0x100)			\
		CC |= F_CARRY;			\
	if((tmp2 ^ A ^ tmp ^ (tmp2 >> 1)) & 0x80)	\
		CC |= F_OVERFLOW;		\
	A = (u8)tmp2;				\
	CheckNZ(A);

#define SBCA					\
	tmp = Read(EA);			\
	tmp2 = A - tmp - (CC & 1);	\
	CC &= ~(F_ZERO | F_NEGATIVE | F_OVERFLOW | F_CARRY);	\
	if(tmp2 & 0x100)			\
		CC |= F_CARRY;			\
	if((tmp2 ^ A ^ tmp ^ (tmp2 >> 1)) & 0x80)	\
		CC |= F_OVERFLOW;		\
	A = (u8)tmp2;				\
	CheckNZ(A);

#define ADCA					\
	tmp = Read(EA);			\
	tmp2 = A + tmp + (CC & 1);	\
	CC &= ~(F_ZERO | F_NEGATIVE | F_OVERFLOW | F_CARRY | F_HALFCARRY);	\
	CC |= (tmp2 >> 8) & 1;	\
	if((tmp2 ^ A ^ tmp ^ (tmp2 >> 1)) & 0x80)	\
		CC |= F_OVERFLOW;		\
	if((tmp2 ^ A ^ tmp) & 0x10)	\
		CC |= F_HALFCARRY;	\
	A = (u8)tmp2;				\
	CheckNZ(A);

#define NEGA					\
	tmp2 = -A;					\
	CC &= ~(F_CARRY | F_OVERFLOW | F_ZERO | F_NEGATIVE);	\
	CC |= (tmp2 & 0x100) >> 8;	\
	if((0 ^ A ^ tmp2 ^ (tmp2 >> 1)) & 0x80)	\
		CC |= F_OVERFLOW;		\
	A = (u8)tmp2;				\
	CheckNZ(A);

#define DECA					\
	A--;							\
	CC &= ~(F_ZERO | F_NEGATIVE | F_OVERFLOW);	\
	if(A == 0x7F)				\
		CC |= F_OVERFLOW;		\
	CheckNZ(A);

#define INCA					\
	A++;							\
	CC &= ~(F_ZERO | F_NEGATIVE | F_OVERFLOW);	\
	if(A == 0x80)				\
		CC |= F_OVERFLOW;		\
	CheckNZ(A);

#define ORB						\
	B |= Read(EA);				\
	CC &= ~(F_ZERO | F_NEGATIVE | F_OVERFLOW);	\
	CheckNZ(B);
	
#define EORB					\
	B ^= Read(EA);				\
	CC &= ~(F_ZERO | F_NEGATIVE | F_OVERFLOW);	\
	CheckNZ(B);
	
#define ANDB					\
	B &= Read(EA);				\
	CC &= ~(F_ZERO | F_NEGATIVE | F_OVERFLOW);	\
	CheckNZ(B);

#define BITB					\
	tmp = B & Read(EA);		\
	CC &= ~(F_ZERO | F_NEGATIVE | F_OVERFLOW);	\
	CheckNZ(tmp);

#define RORB					\
	ntmp = CC & F_CARRY;		\
	CC &= ~(F_ZERO | F_NEGATIVE | F_CARRY);	\
	CC |= B & 1;				\
	B >>= 1;						\
	B |= ntmp << 7;			\
	CheckNZ(B);

#define ROLB					\
	tmp = B;						\
	ntmp = CC & F_CARRY;		\
	CC &= ~(F_ZERO | F_NEGATIVE | F_CARRY | F_OVERFLOW);	\
	CC |= (B >> 7) & 1;		\
	B = (B << 1) | ntmp;		\
	if((tmp ^ B) & 0x80)		\
		CC |= F_OVERFLOW;		\
	CheckNZ(B);

#define LSRB					\
	CC &= ~(F_ZERO | F_NEGATIVE | F_CARRY);	\
	CC |= B & 1;				\
	B >>= 1;						\
	if(B == 0)					\
		CC |= F_ZERO;

#define LSLB					\
	tmp = B;						\
	CC &= ~(F_ZERO | F_NEGATIVE | F_CARRY | F_OVERFLOW);	\
	CC |= (B >> 7) & 1;		\
	B <<= 1;						\
	if((B ^ tmp) & 0x80)		\
		CC |= F_OVERFLOW;		\
	CheckNZ(B);					\

#define ASRB					\
	CC &= ~(F_ZERO | F_NEGATIVE | F_CARRY);	\
	CC |= B & 1;				\
	B = (B & 0x80) | (B >> 1);	\
	CheckNZ(B);

#define TSTB					\
	CC &= ~(F_ZERO | F_NEGATIVE | F_OVERFLOW);	\
	CheckNZ(B);

#define ADDB					\
	tmp = Read(EA);			\
	tmp2 = B + tmp;			\
	CC &= ~(F_ZERO | F_NEGATIVE | F_OVERFLOW | F_CARRY | F_HALFCARRY);	\
	if(tmp2 & 0x100)			\
		CC |= F_CARRY;			\
   if((tmp2 ^ B ^ tmp) & 0x10)	\
      CC |= F_HALFCARRY;	\
	if((tmp2 ^ B ^ tmp ^ (tmp2 >> 1)) & 0x80)	\
		CC |= F_OVERFLOW;		\
	B = (u8)tmp2;				\
	CheckNZ(B);

#define SUBB					\
	tmp = Read(EA);			\
	tmp2 = B - tmp;			\
	CC &= ~(F_ZERO | F_NEGATIVE | F_OVERFLOW | F_CARRY);	\
	if(tmp2 & 0x100)			\
		CC |= F_CARRY;			\
	if((tmp2 ^ B ^ tmp ^ (tmp2 >> 1)) & 0x80)	\
		CC |= F_OVERFLOW;		\
	B = (u8)tmp2;				\
	CheckNZ(B);

#define SBCB					\
	tmp = Read(EA);			\
	tmp2 = B - tmp - (CC & 1);	\
	CC &= ~(F_ZERO | F_NEGATIVE | F_OVERFLOW | F_CARRY);	\
	if(tmp2 & 0x100)			\
		CC |= F_CARRY;			\
	if((tmp2 ^ B ^ tmp ^ (tmp2 >> 1)) & 0x80)	\
		CC |= F_OVERFLOW;		\
	B = (u8)tmp2;				\
	CheckNZ(B);

#define ADCB					\
	tmp = Read(EA);			\
	tmp2 = B + tmp + (CC & 1);	\
	CC &= ~(F_ZERO | F_NEGATIVE | F_OVERFLOW | F_CARRY | F_HALFCARRY);	\
	CC |= (tmp2 >> 8) & 1;	\
	if((tmp2 ^ B ^ tmp ^ (tmp2 >> 1)) & 0x80)	\
		CC |= F_OVERFLOW;		\
	if((tmp2 ^ B ^ tmp) & 0x10)	\
		CC |= F_HALFCARRY;	\
	B = (u8)tmp2;				\
	CheckNZ(B);

#define NEGB					\
	tmp2 = -B;					\
	CC &= ~(F_CARRY | F_OVERFLOW | F_ZERO | F_NEGATIVE);	\
	CC |= (tmp2 & 0x100) >> 8;	\
	if((0 ^ B ^ tmp2 ^ (tmp2 >> 1)) & 0x80)	\
		CC |= F_OVERFLOW;		\
	B = (u8)tmp2;				\
	CheckNZ(B);

#define DECB					\
	B--;							\
	CC &= ~(F_ZERO | F_NEGATIVE | F_OVERFLOW);	\
	if(B == 0x7F)				\
		CC |= F_OVERFLOW;		\
	CheckNZ(B);

#define INCB					\
	B++;							\
	CC &= ~(F_ZERO | F_NEGATIVE | F_OVERFLOW);	\
	if(B == 0x80)				\
		CC |= F_OVERFLOW;		\
	CheckNZ(B);

#define LSR						\
	tmp = Read(EA);			\
	CC &= ~(F_ZERO | F_NEGATIVE | F_CARRY);	\
	CC |= tmp & 1;				\
	tmp >>= 1;					\
	if(tmp == 0)				\
		CC |= F_ZERO;			\
	Write(EA,tmp);

#define ROR						\
	tmp = Read(EA);			\
	ntmp = CC & F_CARRY;		\
	CC &= ~(F_ZERO | F_NEGATIVE | F_CARRY);	\
	CC |= tmp & 1;				\
	tmp >>= 1;					\
	tmp |= ntmp << 7;			\
	CheckNZ(tmp);				\
	Write(EA,tmp);

#define ROL						\
	otmp = tmp = Read(EA);	\
	ntmp = CC & F_CARRY;		\
	CC &= ~(F_ZERO | F_NEGATIVE | F_CARRY | F_OVERFLOW);	\
	CC |= (tmp >> 7) & 1;	\
	tmp = (tmp << 1) | ntmp;\
	if((otmp ^ tmp) & 0x80)	\
		CC |= F_OVERFLOW;		\
	CheckNZ(tmp);				\
	Write(EA,tmp);

#define LSL						\
	otmp = tmp = Read(EA);	\
	CC &= ~(F_ZERO | F_NEGATIVE | F_CARRY | F_OVERFLOW);	\
	CC |= (tmp >> 7) & 1;	\
	tmp <<= 1;					\
	if((tmp ^ otmp) & 0x80)	\
		CC |= F_OVERFLOW;		\
	CheckNZ(tmp);				\
	Write(EA,tmp);

#define ASR						\
	tmp = Read(EA);			\
	CC &= ~(F_ZERO | F_NEGATIVE | F_CARRY);	\
	CC |= tmp & 1;				\
	tmp = (tmp & 0x80) | (tmp >> 1);	\
	CheckNZ(tmp);				\
	Write(EA,tmp);

#define CMP8(n1,n2)			\
	tmp2 = n1 - n2;			\
	CC &= ~(F_CARRY | F_OVERFLOW | F_NEGATIVE | F_ZERO);	\
	CheckNZ(tmp2 & 0xFF);	\
	if(tmp2 & 0x100)			\
		CC |= F_CARRY;			\
	if((n1 ^ n2 ^ tmp2 ^ (tmp2 >> 1)) & 0x80)	\
		CC |= F_OVERFLOW;

#define CMP16(n1,n2)			\
	tmp2 = n1 - n2;			\
	CC &= ~(F_CARRY | F_OVERFLOW | F_NEGATIVE | F_ZERO);	\
	CheckNZ16((u16)tmp2);	\
	if(tmp2 & 0x10000)		\
		CC |= F_CARRY;			\
	if((n1 ^ n2 ^ tmp2 ^ (tmp2 >> 1)) & 0x8000)	\
		CC |= F_OVERFLOW;

#define CMPX					\
	CMP16(X,ReadWord(EA));

#define CMPY					\
	CMP16(Y,ReadWord(EA));

#define CMPU					\
	CMP16(U,ReadWord(EA));

#define CMPS					\
	CMP16(S,ReadWord(EA));

#define CMPD					\
	CMP16(D,ReadWord(EA));

#define CMPA					\
	CMP8(A,Read(EA));

#define CMPB					\
	CMP8(B,Read(EA));

//implied
#define CLRA					\
	A = 0;						\
	CC |= F_ZERO;				\
	CC &= ~(F_CARRY | F_OVERFLOW | F_NEGATIVE);

#define CLRB					\
	B = 0;						\
	CC |= F_ZERO;				\
	CC &= ~(F_CARRY | F_OVERFLOW | F_NEGATIVE);

#define COMA					\
	CC &= ~(F_OVERFLOW | F_ZERO | F_NEGATIVE);	\
	CC |= F_CARRY;				\
	A = ~A;						\
	CheckNZ(A);

#define COMB					\
	CC &= ~(F_OVERFLOW | F_ZERO | F_NEGATIVE);	\
	CC |= F_CARRY;				\
	B = ~B;						\
	CheckNZ(B);

#define ORCC					\
	CC |= Read(EA);

#define ANDCC					\
	CC &= Read(EA);

#define BSR						\
	tmp = Read(PC++);			\
	PushS16(PC);				\
	PC += (s8)tmp;

#define LBSR					\
	tmp2 = ReadWord(PC);		\
	PC += 2;						\
	PushS16(PC);				\
	PC += (s16)tmp2;

#define RTS						\
	PC = PullS16();

#define ABX						\
	X += B;

#define CWAI					\
	CC &= Read(EA);			\
	CC |= 0x80;					\
	PushS16(PC);				\
	PushS16(U);					\
	PushS16(Y);					\
	PushS16(X);					\
	PushS(DP);					\
	PushS(B);					\
	PushS(A);					\
	PushS(CC);					\
	WaitInterrupt |= 0xFF;	\
	message("cwai\n");

#define RTI						\
	CC = PullS();				\
	if(CC & 0x80)				\
		{							\
		A = PullS();			\
		B = PullS();			\
		DP = PullS();			\
		X = PullS16();			\
		Y = PullS16();			\
		U = PullS16();			\
		Cycle += 9;				\
		}							\
	PC = PullS16();

#define SWI						\
	CC |= 0x80;					\
	PushS16(PC);				\
	PushS16(U);					\
	PushS16(Y);					\
	PushS16(X);					\
	PushS(DP);					\
	PushS(A);					\
	PushS(B);					\
	PushS(CC);					\
	PC = ReadWord(0xFFF4);

//oddballs
#define JMP_DIRECT			\
	EA = (DP << 8) | Read(PC++);	\
	PC = (u16)EA;

#define JMP_INDEXED			\
	Indexed();					\
	PC = (u16)EA;

#define JMP_EXTENDED			\
	EA = ReadWord(PC);		\
	PC = (u16)EA;

#define JSR_DIRECT			\
	EA = (DP << 8) | Read(PC++);	\
	PushS16(PC);				\
	PC = ReadWord(EA);

#define JSR_INDEXED			\
	Indexed();					\
	PushS16(PC);				\
	PC = (u16)EA;

#define JSR_EXTENDED			\
	EA = ReadWord(PC);		\
	PC += 2;						\
	PushS16(PC);				\
	PC = (u16)EA;

#define LEAX					\
	X = (u16)EA;				\
	CC &= ~F_ZERO;				\
	if(X == 0)					\
		CC |= F_ZERO;

#define LEAY					\
	Y = (u16)EA;				\
	CC &= ~F_ZERO;				\
	if(Y == 0)					\
		CC |= F_ZERO;

#define LEAS					\
	S = (u16)EA;

#define LEAU					\
	U = (u16)EA;

#define DAA						\
	ntmp = A & 0xF0;			\
	otmp = A & 0x0F;			\
	tmp2 = 0;					\
	if(otmp > 9 || CC & F_HALFCARRY)	\
		tmp2 |= 6;				\
	if(ntmp > 0x80 && otmp > 9)\
		tmp2 |= 0x60;			\
	if(ntmp > 0x90 || CC & F_CARRY)	\
		tmp2 |= 0x60;			\
	tmp2 += A;					\
	CC &= ~(F_OVERFLOW | F_ZERO | F_NEGATIVE);	\
	CC |= (tmp2 >> 8) & 1;	\
	A = (u8)tmp2;				\
	CheckNZ(A);

#define MUL						\
	tmp2 = A * B;				\
	CC &= ~(F_ZERO | F_CARRY);	\
	CC |= (tmp2 & 0x80) >> 7;	\
	if((tmp2 & 0xFFFF) == 0)	\
		CC |= F_ZERO;			\
	D = (u16)tmp2;

#define SEX						\
	D = (B & 0x80) ? B | 0xFF00 : B;	\
	CheckNZ16(D);

//functions
#define PSHS					\
	PSHS();

#define PSHU					\
	PSHU();

#define PULS					\
	PULS();

#define PULU					\
	PULU();

#define EXG						\
	EXG();

#define TFR						\
	TFR();
